Recently, the Institute of Electric and Electronic Engineers stipulated a transmission standard of Gigabit Ethernet. In this transmission standard, four unshield twisted pair-category 5 (UTP-CAT5) transmission lines are used to transmit data at a rate of giga bits per second. For complying with such high speed transmission, the transceiver of each node has to overcome the noise problems resulting from, for example, inter-symbol interference (ISI), echo, near-end cross talk (NEXT) and far-end cross talk (FEXT) phenomena.
Please refer to FIG. 1A which is a functional block diagram schematically showing a transceiver of a node in a Gigabit Ethernet. In the signal receiving path, an analog signal is processed by the UTP-CAT5 transmission lines 10, hybrid 11, analog front end (AFE) 12 and analog-to-digital converter (ADC) into a digital data signal x(n) essentially suffered from the ISI phenomena (The FEXT phenomena can be ignored). The digital data signal x(n) is transmitted to the subsequent adaptive decision feedback equalizer (ADFE) 16 to be further processed in order to remove the ISI effect, and then transmitted to be processed by the downstream decoder 17, packet and cell switch (PCS) 18 and medium access controller 19. Finally, the processed digital data is transmitted to the network node itself, e.g. a personal computer. The PCS 18 also outputs some signals which pass through an adaptive echo canceller 14 and an adaptive NEXT canceller 15 and then enter the ADFE 16. FIG. 1B shows the waveform diagram of the channel impulse response of a digital data signal x(n). The left portion from the dash line is so called as precursor ISI, and the right portion from the dash line is so called as postcursor ISI.
Please refer to FIG. 2A which is a schematic functional block diagram of a conventional adaptive decision feedback equalizer. The conventional ADFE uses a feed forward equalizer (FFE) 21 and a feed back equalizer (FBE) 22 to eliminate the precursor ISI and postcursor ISI, respectively. The coefficients of the FEE 21 and FBE 22 are determined and refreshed by a first and a second coefficient refresher 23 and 24 according to the error signal e(n) and the previous values thereof. The slicer 25 quantizes the signal y(n) to recover the digital data signal d(n). The operational principle of the ADFE shown in FIG. 2A is based on least-mean-square (LMS) algorithm, involving the following equations:
                              y          ⁡                      (            n            )                          =                ⁢                                            ∑                              k                =                0                                                              N                  f                                -                1                                      ⁢                                          x                ⁡                                  (                                      n                    -                    k                                    )                                            ⁢                                                w                  k                                ⁡                                  (                  n                  )                                                              -                                    ∑                              k                =                1                                                              N                  b                                -                1                                      ⁢                                          d                ⁡                                  (                                      n                    -                    k                                    )                                            ⁢                                                f                  k                                ⁡                                  (                  n                  )                                                                                                      d          ⁡                      (            n            )                          =                ⁢                  Q          ⁡                      [                          y              ⁡                              (                n                )                                      ]                                                            e          ⁡                      (            n            )                          =                ⁢                              d            ⁡                          (              n              )                                -                      y            ⁡                          (              n              )                                                                                    w            k                    ⁡                      (                          n              +              1                        )                          =                ⁢                                            w              k                        ⁡                          (              n              )                                +                      μ            ⁢                                                  ⁢                          x              ⁡                              (                                  n                  -                  k                                )                                      ⁢                          e              ⁡                              (                n                )                                                                                                  f            k                    ⁡                      (                          n              +              1                        )                          =                ⁢                                            f              k                        ⁡                          (              n              )                                +                      μ            ⁢                                                  ⁢                          d              ⁡                              (                                  n                  -                  k                                )                                      ⁢                                          e                ⁡                                  (                  n                  )                                            .                                          
The data-processing rate of this ADFE is confined by the bandwidth of the decision feedback loop (DLP), and thus is limited within a certain level. In order to solve this problem, a pipeline method is developed, which is referred to FIG. 2B. FIG. 2B shows another conventional adaptive decision feedback equalizer. The detailed description of the pipeline method is referred to Naresh R. Shanbhag, Keshab K. Parhi, “Pipelined adaptive DFE architectures using relaxed look-ahead,” IEEE Trans. Signal Processing, vol. 43, No. 6, pp. 1368-1385, June 1995, which is incorporated herein for reference. Different from the ADFE of FIG. 2A, k delay units are additionally provided for the decision feedback loop (DLP). It is to be noted that the additional k delay units are shown outside the FBE 22 in FIG. 2B for simplifying the drawing. In practice, however, the additional k delay units are generally arranged inside the FBE 22. Accordingly, the FBE 22 is divided into (k+1) groups of sub-circuits with a delay unit in each sub-circuit. The pipeline operation is performed with the (k+1) groups of sub-circuits, so as to improve the overall processing speed.
This pipeline method, although has relatively high processing rate, suffers from a low signal-to-noise ratio. Due to the increased delay time, the waveform response of the FBE 22 will become the one illustrated in FIG. 2C. Since the presence of the additional k delay units, the postcursor ISI relating to the delay time of preceding k delay units is limited to zero, as indicated by the arrow in FIG. 2C. Accordingly, the FBE cannot perform well, and so as to reduce the overall signal-to-noise ratio of the system and deteriorate the signal quality. Modification on the FFE 21 may alleviate the problem, but make the circuitry of the FFE 21 even more complicated. Moreover, the signal quality has not been significantly improved.